array processor

Application of VLSI Array Processor s to signal and image processing

VLSI阵列处理器在信号处理和图象处理中的应用

Coordinate transformations in the design of a robust array processor

一种鲁棒型阵列处理器设计中的坐标变换

Study on the Effect of Ultra-fine Combined Treatment Phosphate Rock Powder multiple array processor

超微细磷矿粉复合处理及其效应研究

On the effects of sensor signal fluctuation on the performance of AR high resolution array processor

相关基元信号起伏对一类AR方法阵处理器统计性能的影响

ARRAY PROCESSOR 150 Treatment of mass burns

150数列处理机成批烧伤的救治

A FFT Array Processor Based on FPGA

一种基于FPGA的FFT阵列处理器

This design can provide a high-speed path to a set of SHARC Parallel Array Processor .

本设计的目的在于为一套SHARC并行处理阵列机提供高速的数据通道，使其能与模拟信号采集模块进行实时的数据传输。

Multiple array processor programmable signal processor

复合天线阵信号处理机

Associative linear array processor

相联线性阵列处理机

Logic design of the arithmetic unit is simplified , and the performance of the array processor system is enhanced with microprogramming .

GF-10-12采用微程序设计技术，大大简化了加法部件和乘法部件的逻辑设计，给用户提供许多性质不同的指令，从而大大增强了系统的功能。

Array processor can be divided into two types , square array and linear array based on processing element ( PE ) array interconnection structure .

阵列处理器根据运算单元阵列的互连结构，主要分成方形阵列和线性阵列两种。

For large scientific and engineering problem , an array processor might relieve the main processor of the time-consuming chore of array manipulation .

对一些庞大的科学和工程问题，一个阵列处理器可以把主处理器从耗费时间的向量处理的杂务中解脱出来；

A Programable FFT Array Processor

可编程FFT阵列处理器

Array processor is being the focus of embedded video field because of its excellent data-parallel computing performance , better flexibility , lower power consumption and smaller area .

阵列处理器，因其具有强大的数据并行计算能力、较好的灵活性、较低的功耗和较小的面积，成为嵌入式视频领域的焦点。

This paper describes the method by which the computing speed problem may be solved , that is , a minicomputer in combination with AP ( Array Processor ) is used in large real time task .

本文介绍一种在大型实时任务中提高计算速度的方法&在任务中联合应用小型计算机与数组处理机。

In this paper , the principle of Insert Merging Algorithm is introduced , and the realizing process of VLSI array processor is expatiated by demonstrating the way of getting the algorithm 's systolic array .

介绍了插入归算法的原理。并通过该算法的脉动阵列实现，阐述了超大规模集成电路阵列处理器的实现过程。

In addition , we made simulation on the ASIP array processor with the image denoise algorithm based on 5 / 3 lifting wavelet transform , and the results showed that our design was correct and effective .

此外，本文结合5/3提升小波滤波算法对其进行了仿真实验，结果表明我们设计的ASIP阵列处理机是正确有效的。

When the method of Gaussian elimination is used for solving a linear system of algebraic equations on an array processor or a cellular vector computer , the main operation is to perform a great many of row vector transformations .

在阵列机或细胞结构向量机上用高斯消去法求解线性代数方程组的基本操作是进行大量的行向量变换。

We also discuss their algorithmic similarity to " bit-masks " and " local index registers " in an array processor , and the similarity to " operation control vectors " and " indirect control vectors " in a vector computer .

最后，讨论它们与阵列机的屏蔽位和与处理单元有关的局部变址算法上的相似性，以及它们与向量机的运算控制向量和间接控制向量的相似性。

The FPGA Design of Large Scale Array Signal Processor

大规模阵列信号处理机的FPGA设计

The 1024 points complex FFT ( or IFFT ) could be calculated in 519 μ s by 4 units array FFT processor .

采用4个单元的FFT阵列处理器可以使1024点的复数FFT（或IFFT）在519μS内完成。

A high-speed image collecting system used in the H-S wavefront detection is presented in the paper . The image collecting system is applied to solving the coordinating problem between high frame rate detector array and data processor .

本文介绍了一种应用于H－S法波前探测的高速图象采集系统，提出了应用本图象采集系统解决高帧频探测器阵列与数据处理机之间的同步协调的方法。

Phased array pulse Doppler radar processor contains kernel and key technique of modern radar .

相控阵脉冲多普勒雷达信号处理机中包含了现代雷达的核心和关键技术。

By appending the array as a co processor to the Godson 1 architecture , authors build the hardware model of the accelerator .

该文通过在龙芯1号处理器上附加一个脉动式阵列的协处理器，构建了硬件模型。